- IC packaging and electronic component assembly
- 2nd level interaction between electronic components and PWB assembly processes
- Environmental Compliance of electronic components
- 30+ years involvement with generation of J-STD-020 and accompanying standards for Moisture Sensitivity (J-STD-033) and Process Sensitivity (J-STD-075)
- Chairman JEDEC JC14.4 - Quality Systems
- Co-chair IPC 2-15f - Obsolete and Discontinued Products
Current projects:
- Currently leading joint IPC, ECIA, and JEDEC working group to add XML data exchange option to customer notification standards J-STD-048 (Product Discontinuance) and J-STD-046 (Product/Process Changes)
- Leading JEDEC working group to generate wire pull test method for copper wire bonds, which will be given document number JESD22-B120. Working group is defining wire pull and bond (ball and stitch) pull test methods, and will propose minimum pull forces for Cu bond wires
- Co-leading iNEMI project, "New Package Technology Qualification Methodology"
Senior Engineer at IBM
MS in Engineering Mechanics, 1987